一种新型带数字校准的超低噪声CMOS参考电压源

A Novel Ultra Low Noise CMOS Voltage Reference Circuit with Digital Calibration Scheme

提出了一种新型的超低噪声参考电压源。该参考电压源采用基于CMOS阈值电压的偏置电压源结构,具有极低的输出噪声。使用数字校准的方法,将输出电压与精准带隙电压源电压进行比较和校正,提高输出电压的精度。整体电路使用TSMC 0.18μm RF CMOS工艺设计并物理实现,集成于高性能射频接收器芯片中。仿真结果表明,该低噪声参考电压源的输出噪声在1 kHz时为62nV/Hz12、在1 MHz时为12.3 nV/Hz12。测试结果表明,该低噪声电压源的输出电压值参照带隙基准源,误差为±10 mV。

A novel ultra low noise CMOS voltage reference circuit with digital calibration scheme is presented. This voltage reference is based on CMOS threshold voltage （Vth） bias circuit and has very low output noise. The accuracy of the output voltage is ensured by using a digital calibration scheme, which calibrates the output voltage of the circuit with a voltage from the bandgap circuit. The proposed circuit is designed and implemented by using TSMC O. 18um RF CMOS process and integrated in a high performance RF receiver chip. The simulation results indicate that the output noise of this voltage reference circuit is 62 nV/Hz1/2 at 1 kHz and 12.3 nV/Hz 1/2- at 1MHz. The measurement results show that the output voltage difference between this circuit and bandgap reference is ±10 mV.