摘要
分析了现有指数时间采样重置电路的结构和写SRAM的工作时序,设计了一种新型的单稳态脉冲生成电路,加入到像素电路中形成新的SRAM写模式.采用此方法使得单个像素的平均写SRAM次数由2-1/2N次降为1次,消除了大动态范围CMOS图像传感器中SRAM的无效写操作.在CSM0.35μm2P4M3.3V的工艺条件下,利用Cadence Spectre和Hspice工具分别对单稳态脉冲电路和改进后的像素电路进行了仿真实验,证明了此方法的有效性.
Analyzed the circuit architecture and operate timing of index time sampling reset circuit, and a novel monostable pulse generator was designed and applied in pixel unit to form a new writing model of SRAM. By adopting this method, the writing times of SRAM was reduced from 2 - 1/2^N to 1, and ineffective writing operation in high dynamic CMOS image sensor was eliminated. Under the technology of CSM 0.35um 2P4M 3.3V, mono-stable pulse generator and improved pixel unit were simulated by Cadence Spectre and Hspice, and simulation result proved the effectiveness of this method.
出处
《微电子学与计算机》
CSCD
北大核心
2009年第7期105-108,共4页
Microelectronics & Computer
基金
中国科学技术大学研究生创新基金资助项目(KD2007051)