摘要
介绍了用CPLD+HDL的EDA技术作为开发手段,实现对多通道的脉冲信号计数的脉冲计数器的设计,并利用单片机将计数结果传给上位机,论述了基于VHDL语言和芯片的数字系统的设计思想和过程,通过对设计结果的系统仿真波形分析,验证了计数器设计的正确性。
The design of a pulse counter to multi-channel pulse counter with EDA technology of CPLD + VHDL is presented, and the results are spread to the place of PC using the microcontroller, the designing idea and implementation process based on VHDL and CPLD were also described. With the analysis of the simulation experimental outcome, the correct designing is proved.
出处
《科学技术与工程》
2009年第14期4006-4011,共6页
Science Technology and Engineering