基于VHDL的一个简单Mealy状态机

Simple Mealy State Machine Based on VHDL Language

以帮助理解Mealy状态机为目的,采用VHDL语言设计一个简单的Mealy状态机,来检测数据流"1101010",并采用软件QuartusⅡ对所写程序进行编译、仿真,得出其状态图、波形图。首先介绍状态机的基本概念及其分类,其次分析Mealy状态机的设计过程并编写程序,最后通过QuartusⅡ对编写软件编译、仿真,使所得到的状态图和波形图合理,并与分析完全一致。这里编写的程序简单、合理,容易理解,可以对Mealy状态机有一个更全面的认识。

A simple mealy state machine with the VHDL language to examine the data stream ＂1101010＂is designed and Quartus Ⅱ is used to simulate and compile the program,its state diagram and waveform are obtained. A state machine＇s basic concept and its classification are introduced,the Mealy state machine＇s design process is analysed and a program is written,the results through compiling and simulating the program are obtained, the result is reasonable, completely consistent with the analysis. A more comprehensive understanding on Mealy state machine through this article.