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Ultra-low-voltage-trigger thyristor for on-chip ESD protection without extra process cost 被引量：1

Ultra-low-voltage-trigger thyristor for on-chip ESD protection without extra process cost
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摘要 A new thyristor is proposed and realized in the foundry＇s 0.18-μm CMOS process for electrostatic dis-charge（ESD） protection.Without extra mask layers or process steps, the new ultra-low-voltage-trigger thyristor（ULVT thyristor） has a trigger voltage as low as 6.7 V and an ESD robustness exceeding 50 mA/μm, which enables effective ESD protection.Compared with the traditional medium-voltage-trigger thyristor（MVT thyristor）, the new structure not only has a lower trigger voltage, but can also provide better ESD protection under both positive and negative ESD zapping conditions. A new thyristor is proposed and realized in the foundry＇s 0.18-μm CMOS process for electrostatic dis-charge（ESD） protection.Without extra mask layers or process steps, the new ultra-low-voltage-trigger thyristor（ULVT thyristor） has a trigger voltage as low as 6.7 V and an ESD robustness exceeding 50 mA/μm, which enables effective ESD protection.Compared with the traditional medium-voltage-trigger thyristor（MVT thyristor）, the new structure not only has a lower trigger voltage, but can also provide better ESD protection under both positive and negative ESD zapping conditions.
作者 单毅 何军 黄文毅
机构地区 Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences Grace Semiconductor Manufacturing Corporation
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2009年第7期80-82,共3页 半导体学报（英文版）
关键词 THYRISTOR electro-static discharge ultra-low-voltage-trigger positive negative thyristor electro-static discharge ultra-low-voltage-trigger positive negative
分类号 TN34 [电子电信—物理电子学] TP336 [自动化与计算机技术—计算机系统结构]
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参考文献9

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Journal of Semiconductors
2009年 第7期

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