H.264/AVC运动补偿的VLSI优化实现

Optimized VLSI Implementation of H.264/AVC Motion Compensation

提出了针对H.264/AVC视频解码运动补偿模块的VLSI优化实现。首先,提出了运动补偿模块的自适应流水线结构以及4像素并行处理的方式以提高系统性能;其次,提出并设计了3层存储结构,不仅降低了整个存储器系统的功耗,也降低了对片外存储器的带宽需求;最后,针对宏模块中亮度和色度的计算,计算了复杂度并优化了系统性能。

An optimized VLSI implementation of motion compensation in H.264/AVC video decoding is proposed. Firstly, selfadaptive pipeline and 4-pixel parallel processing are adopted to enhance the system throughput. Secondly, a three-level memory hierarchy is proposed to reduce both memory access power and bandwidth. Finally, the computation complexity and throughput of pixel calculation are carefully optimized.