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一种基于8 bit CPU核的混合SoC验证平台的设计(英文) 被引量:1

Design of a System Verification Platform for Mixed-Signal SoC Based on 8 bit CPU Core
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摘要 提出了一种基于8 bit CPU的混合信号SoC的验证平台。该平台能够完成IP模块验证、软硬件协同验证、混合验证等关键验证流程。该验证平台已经成功地应用在某混合信号SoC的设计上,并在0.35μm CMOS工艺上进行了实现。该验证平台对其它混合SoC设计具有一定的参考作用。 A verification solution based on 8 bit CPU for mixed-signal SoC named SoC-MV is presented. SoC-MV can support IP function verification, collaborative verification, and mixed-signal verification. The platform has been applied to a mixed-signal SoC including 8 bit CPU and an ADC. This SoC has been fabricated by 0. 35 μm CMOS process and the chip test results show that the chip is successful and the interface between digital and analog works properly.
出处 《电子器件》 CAS 2009年第3期586-591,共6页 Chinese Journal of Electron Devices
关键词 混合SoC 验证平台 8位CPU核 数模混合仿真 mixed-signal SoC verification platform 8 bit CPU core digital and analog co-simulation
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