磁通门传感器接口ASIC设计(英文)

Design of fluxgate sensor interface ASIC

基于磁通门传感器的二次谐波选择法原理,采用0.6μm,N-well标准模拟CMOS工艺,设计并实现了磁通门传感器专用集成电路接口(ASIC)。这种集成磁通门接口电路能够减小传统分立元件接口电路的体积,降低系统能耗,满足航天、军事等领域的微型化、低功耗需求。在分析磁通门传感器结构和特点的基础上,完成了激励电路及检测电路的设计,芯片面积为2.0mm×2.0mm,并采用HSPICE对电路各部分功能及其指标进行验证。对与微型磁通门探头集成的电路系统进行了测试,结果表明,当测量范围为±90μT时,灵敏度可达16.5mV/μT;在5V电源电压下,其功耗为35mW。

A fluxgate sensor interface, Application Specific Intergrate Circuits（ASIC） based on the Complementary Metal Oxide Semiconductor（CMOS）, is designed and manufactured by a 0.6 μm DPDM P-sub brief process and the second-harmonic detection of output voltage. This kind of integrated interface circuit of the fluxgate can decrease the dimension of traditional discrete components, and can reduce the power consumption to meet the requirements for miniaturization and low-power consumption in aviation and military domains. In consideration of the structure and specification of the fluxgate sensor, the excitation and pick-up circuits with the size of 2 mm× 2 mm for the sensor are proposed, and the functions and parameters of all parts of the circuits are verified by a HSPICE. The experiment results of the circuit system with the fluxgate sensor show that the circuit can offer a sensitivity of 16. 5 μV/nT and the linear ranges of ±90 μT. With a voltage supply of 5 V, the total power consumption of the circuit is as low as 35 mW.