基于VHDL的HDB_3译码器的设计与实现

Design and Implementation of HDB3 Encoder Based on VHDL

通过对HDB3码的特殊性分析,在进行编码时引用计数器来计算两个V之间1的个数,经过4个码元后,开始判断是否插B,同时采用双向码解决了插V难的问题。最后,采用VHDL语言在Max+plusⅡ中实现了HDB3码的编码。

The design concept for eneoder of HDB3 code is that firstly find the crab code ‘V＇, and make sure if the wreck eocle ‘V＇ conforms to 1 or 0 in the 3rd symbol. In the meantime, make sure that there are no complement code ‘B＇, restnne 4 sequential ‘0＇code accordingly, substitute all ‘- 1＇ for plus1, and output encode information finally. The encoding of HDB3 code can be achieved in Max ＋ plus Ⅱ by VHDL when making simulation.