摘要
基于自主开发的薄膜SOI高低压兼容工艺,研制出一种64位输出的薄膜SOI PDP高压寻址驱动集成电路。测试结果显示,该电路具有80 V驱动电压和20 mA输出电流,电路时钟频率大于40 MHz。
A 64-bit PDP data driver circuit based on thin layer SOl was developed successfully. Test results showed that the circuit had a driving voltage up to 80 V and a maximum output current of 20 mA, with a clock frequency over 40 MHz.
出处
《微电子学》
CAS
CSCD
北大核心
2009年第4期449-452,共4页
Microelectronics
基金
"十一五"预研项目资助(51308020201)
电子科技大学校青年基金资助项目(JX0831)