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倒装芯片集成电力电子模块的热设计 被引量：3

Thermal Design of Integrated Power Electronics Module Using Flip-Chip Technology
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摘要 将倒装芯片(Flip Chip,FC)技术引入三维集成电力电子模块(Integrated Power Elec-tronic Module,IPEM)的封装,可构建FC-IPEM。在实验室完成了由两只球栅阵列芯片尺寸封装MOSFET和驱动、保护等电路构成的半桥FC-IPEM。针对半桥FC-IPEM,建立半桥FC-IPEM的一维热阻模型,分析模块主要的热阻来源。运用FLOTHERM软件进行三维仿真,得到模块温度分布结果,给出优化模块热性能的依据。 Flip chip （F C） technology was used for packaging three-dimensional integrated power electronics module （IPEM） to fabricate FC-IPEM. A half-bridge （HB） FC-IPEM consisting of two ball-grid array chip-size packaged MOSFETs, corresponding gate driver and protection circuits was realized. One-dimensional thermal resistance model of HB FC-IPEM was built to analyze thermal resistance source. Simulation was made by using FLOTHERM to obtain thermal distribution of the module, and design strategies to optimize thermal behavior of the module were given.
作者 王建冈 阮新波
机构地区 盐城工学院电气工程学院 南京航空航天大学自动化学院
出处 《微电子学》 CAS CSCD 北大核心 2009年第4期465-469,共5页 Microelectronics
基金 江苏省高校自然科学基金研究项目(08KJD470004) 江苏省高校"青蓝工程"资助
关键词 电力电子 倒装芯片 三维封装 热设计 Power electronics Flip chip Three dimensional packaging Thermal design
分类号 TN42 [电子电信—微电子学与固体电子学]
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参考文献11

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二级参考文献17

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共引文献13

同被引文献28

引证文献3

二级引证文献10

微电子学
2009年 第4期

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