摘要
介绍了一个基于0.25μmCMOS工艺的2.645GHz正交本振产生电路。该电路由LC-压控振荡器,高频缓冲放大器和二阶无源多相滤波器组成。差分高频缓冲放大器采用电流复用技术降低功耗;同时,这种电路结构只需一组LC谐振网络作负载,可以大大减小芯片面积。为了提高正交信号的匹配精度,提出一种新的二阶无源多相滤波器的版图布局;这种布局实现了器件之间的精确匹配,减小了寄生电容和电阻。测试结果显示,VCO振荡范围为2.46~2.78GHz;在输出频率为2.645GHz时的相位噪声为-120dBc/Hz@1MHz;当二阶无源多相滤波器的输出幅度为0.86dBm时,高频放大器消耗的电流仅为5mA。测试得到I/Q四路的最大幅度失配为1.1%,后仿真的相位误差为0.6°。
A 2. 645 GHz quadrature LO generator based on 0. 25μm CMOS process was presented, which consists of LC-VCO, high frequency buffer amplifier and 2nd-order passive poly-phase filter. Current reuse technique was used for the novel buffer amplifier to reduce power dissipation. The chip area was drastically reduced, since only one LC resonant tank was needed as load. To improve the accuracy of quadrature signals generated, a novel layout for the 2nd-order passive poly-phase filter was proposed to achieve good match between components and to reduce parasitic capacitance and resistance. Test results showed that the circuit had a VCO frequency range from 2. 46 GHz to 2. 78 GHz, and a phase noise of 120 dBc/Hz at 1 MHz offset from 2. 645 GHz carrier. When the output amplitude of the 2nd-order passive poly-phase filter reached 0. 86 dBm, the current of the amplifier was only 5 mA. The max amplitude mismatch was measured to be 1.1%, and a phase error of about 0. 6 °was measured in post-simulation.
出处
《微电子学》
CAS
CSCD
北大核心
2009年第4期511-515,共5页
Microelectronics