一种高速高精度Σ-Δ调制器的设计

Design of a High-Speed and High-Resolution Σ-Δ Modulator

采用多位D/A转换器是Σ-Δ调制器实现高速高精度的主要手段,然而,多位D/A转换器引入非线性却是影响Σ-Δ调制器信噪比的主要因素。讨论了一种具有单位信号传递函数、动态元件匹配实现多位D/A转换器并对其引入的非线性噪声压缩整形(NSDEM)的Σ-Δ调制器结构;在此结构上进行了Σ-Δ调制器的设计方法研究。行为仿真结果验证了该结构和设计方法的可行性。

∑-△modulator is one of the high-speed and high-resolution analog-to-digital converter. Its implementation needs low over-sampling technique and multi-bit D/A converter. Noise induced by multi-bit D/A converter becomes one of the key factors deteriorating SNR of ∑-△modulator. A novel structure with signal unity transfer function, dynamic element matching and noise shaping （NSDEM） was discussed. Design methodology for ∑-△ modulator based on the proposed structure was studied. The behavioral simulation indicated the validity of the structure and the design method.