摘要
随着芯片级多线程(CMT)处理器体系结构的迅速发展,操作系统必须采用新型CMT调度,以发挥其体系结构的性能优势。分析CMT调度面临的问题,通过扩展调度域的层次和结构支持CMT处理器内部的负载均衡,利用协同调度避免cache抖动等问题。采用效率、效率瓦特比和公平性等多种指标对操作系统进行性能评价,证明其性能得到优化。
With the development of Chip Multi-Threaded(CMT) processor architecture, operating system must adopt an innovational CMT schedule algorithm to exert the advantage of performance for CMT processor architecture. This paper analyzes the problems of the CMT schedule. It extends the hierarchy and structure of scheduling domain to sustain the inner load of a CMT processor, imposes co-schedule to avoid cache thrashing. Operating system uses various standards evaluating performance, such as efficiency, and ratio of efficiency to watt, fairness and proves performance of system has optimized.
出处
《计算机工程》
CAS
CSCD
北大核心
2009年第15期277-279,共3页
Computer Engineering
关键词
芯片级多线程
调度
多核
Chip Multi-Threaded(CMT)
schedule
multi-core