基于分布式算法的FIR数字滤波器的FPGA实现

Design and Implementation of FIR Digital Filter Using FPGA Based on Distributed Algorithm

根据基于查找表结构的分布式算法的基本原理,提出了基于分布式算法的有限脉冲响应数字滤波器(FIR)的实现方法.用FPGA设计并实现了一个32阶低通有限脉冲响应数字滤波器.利用有限脉冲响应数字滤波器线性相位的特性减小了电路规模,采用分割查找表的方法减小了存储空间,采用并行分布式算法结构和流水线技术提高了滤波器的速度.对滤波器性能进行了分析.

The principle of distributed algorithm on the basis of look-up table is introduced, and a method of implementing FIR digital filter using distributed algorithm is proposed. A 32-tap low-pass FIR digital filter is designed and implemented by using FPGA. By using the characteristic of FIR digital filter linear phase to reduce the circuit scale and parting look-up table to reduce storage space, adopting parallel distributed algorithm and pipelining technology to increase circuit speed,the performance of the filter is analyzed.