摘要
为了采用FPGA来实时实现Sobel边缘检测,设计者往往自己编写代码。在此介绍基于QuartusⅡ提供的参数可设置宏功能模块,实现Sobel边缘检测的新方案。该方案获得了比用户编写的代码更优的综合和实现结果,节省了宝贵的设计时间,并且获得了很好的边缘检测效果。
To realize real- time Sobel- edge detection using FPGA,designers often encode their own logic. A new design scheme of Sobel - edge detection based on the Quartus Ⅱ - provided parameterizable Megafunctions is introduced. The scheme gets more efficient logic synthesis and device implementation than coding users' own logic,saves valuable design time and obtains very good result.
出处
《现代电子技术》
2009年第16期44-46,共3页
Modern Electronics Technique