摘要
基于PowerPC处理器的多通道通信系统中需要相应的控制器用于实现数据缓冲和控制、握手信号的产生。文中介绍了一种基于FPGA实现的四通道语音通信控制器,该控制器使用异步FIFO实现数据缓冲,应用基于FSM(有限状态机)的逻辑电路控制AD、DA转换芯片周期性的、依次处理各通道的语音和MPC860T传送数据。设计时对各部分电路的设计方法进行了深入的研究,以使其满足系统功能和时序要求,应用该控制器的多通道语音通信系统话音质量稳定、没有杂音,能够满足性能要求。
Communication between different clock domains is involved in systems of voice acquisition and playback,thus a control logic should be designed to buffer data and generate control and handshaking signals.A control logic based on FPGA is discussed in this paper.It's composed of asynchronous FIFOs,modules designed based on FSM and imployed to provide control signals for the AD,DA convertor to process one of the four channels peridiealy, sequentially and MPC860T data transfer.The control logic mentioned above has already been used in our speech acquisition and playback system which has a high and stable p'erformaee.
出处
《微计算机信息》
2009年第23期148-150,共3页
Control & Automation
基金
基金申请人:刘庆华
项目名称:基于声传感阵列的语音技术研究
基金颁发部门:广西区科技厅(0832007z)