期刊文献+

面向低压高频开关应用的功率JFET的功耗 被引量:2

Power Loss of Power JFET Facing to Low Voltage and High Frequency Switching Application
下载PDF
导出
摘要 提出了一种埋氧化物槽栅双极模式功率JFET(BTB-JFET),其面向低压高频开关应用。首次通过仿真对BTB-JFET、常规的槽栅双极模式JFET(TB-JFET)和槽栅MOSFET(T-MOSFET)等20V级的功率开关器件在高频应用时的功率损耗进行了比较。仿真中借鉴现有的高性能T-MOSFET的结构尺寸,并采用了感性负载电路对器件进行静态以及混合模式的电特性仿真,结果表明,常开型BTB-JFET与TB-JFET相比,零偏压时栅漏电容CGD减小25%;当工作频率为1MHz和2MHz时常开型TB-JFET与T-MOSFET相比总功耗分别降低了14%和19%,而常开型BTB-JFET较TB-JFET的总功耗又进一步降低了6%。仿真结果还表明,在不同工作频率下,常闭型JFET的性能都不如T-MOSFET。样管初步测试结果证明,常开型BTB-JFET与TB-JFET相比,零偏压时栅漏电容CGD减小45%,与仿真结果相一致。 A buried-oxide trench-gate bipolar-mode power JFET (BTB-JFET) facing to low voltage and high frequency switching application is presented. Power loss comparison at high frequency among 20V-rated power switching devices, including BTB-JFET, conventional trench-gate bipolar-mode JFET (TB-JFET) and trench-gate MOSFET (T-MOSFET), is carried out by means of simulation based on static analysis and mixed-mode analysis using an inductive switching circuit for the first time. Simulation results show that the gate-drain capacitance C^D of normally-on BTB-JFET has an improvement up to 25% than that of TB-JFET at zero source-drain bias. Normally-on TB-JFET has at least 14% total power loss improvement at 1MHz and 19% at 2MHz compared to that of the T-MOSFET, while normally-on BTB-JFET can provide 6% more improvement at 1 and 2MHz compared to that of the TB-JFET. Simulation results also show that the normally-off JFET always perform worse than the T-MOSFET at different frequencies. The measurement results of samples still under fabrication show that the C6D of normally-on BTB-JFET has an improvement up to 45% than that of TB-JFET at zero source-drain bias, which accords with simulation.
出处 《电工技术学报》 EI CSCD 北大核心 2009年第8期106-110,共5页 Transactions of China Electrotechnical Society
基金 北京市教委科技发展计划资助项目(KM200510005022)
关键词 槽栅MOSFET 槽栅双极模式JFET 栅漏电容 埋氧化物 功耗 Trench-gate MOSFET, trench-gate bipolar-mode JFET, gate-drain capacitance, buried oxide, power loss
  • 相关文献

参考文献10

  • 1Ma L, Amali A, Kiyawat S, et al. New trench MOSFET technology for DC-DC converter applications[C]. IEEE 15th ISPSD, Cambridge, UK, 2003: 354-357.
  • 2Parthasarathy V, Zhu R, Khemka V, et al. A 0.25ktm CMOS based 70V smart power technology with deep trench for high-voltage isolation[C]. IEEE IEDM Tech, San Francisco, CA, USA, 2002: 459-462.
  • 3Hidefumi T, Kyosuke M, Kimimori H, et al. Floating island and thick bottom oxide trench gate MOSFET (FITMOS)[C]. Proceedings of the 17th International Symposium on Power Semiconductor Devices & IC's, Santa Barbara, CA, USA, 2005:1-4.
  • 4Lovoltech. High performance N-channel vertical power JFET transistor[OL]. Company datasheet, 2003 1-5. http://www.qspeed.com (formerly http://www.lovol tech. com).
  • 5Hamza Y. Self-aligned trench MOS junction field- effect transistor for high-frequency applications: US, 6878993 B2[P].
  • 6亢宝位,吴郁,田波,等.高频低功耗结型场效应晶体管..中国发明专利:2005101321119..
  • 7田波,亢宝位,吴郁,韩峰.栅极下加氧化层的新型沟槽栅E-JFET仿真研究[J].电力电子技术,2007,41(6):96-98. 被引量:1
  • 8Zandt M, Hijzen E, Hueting R, et al. Record-low 4 mΩ· mm2 specific on-resistance for 20V trench MOSFETs[C]. ISPSD'03, Cambridge, UK, 2003: 32-35.
  • 9Nishizawa J, Yamamoto K. Manufacture of semiconductor device: Japan, 56-112760[P]. Nishizawa J, Yoshida T. Static induction transistor: US, 4326209[P].
  • 10Nishizawa J, Yoshida T. Static induction transistor: US, 4326209[P].

二级参考文献2

  • 1Nishizawa Jun-ichi.Field Effect Transistor with Reduced Series Resistance[P].United States Patent 4,115,793,September 19,1978.
  • 2Yu.Complementary Junction Field Eeffect Transistors[P].United States Patent 6,307,223,October 23,2001.

共引文献1

同被引文献18

引证文献2

二级引证文献6

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部