基于FPGA的FFT处理器研究与设计

Research and Design for FFT Processor Based on FPGA

给出了一种基于CORDIC算法的FFT处理器的设计方案,可实现高速定点实时的FFT运算。该设计以基2时序抽取FFT算法为基础,采用流水线技术来提高整个系统的吞吐率,具有硬件结构简单,配置灵活,器件耦合性低,精度高,系统稳定的特点。该设计已在Altera芯片EP2C35F672C6上进行了时序仿真,能够满足50MHz的系统时钟。

In this paper, an FFT processor design based on CORDIC algorithm has proposed. The processor may perform the high speed fixed - point real - time FFT operation. This design extracts the 2 - bases in FFT algorithm as the foundation, uses the assembly line technology to enhance the turnover rate for the whole system, has many characteristics with the simple hardware architecture, flexible disposition, low component coupling, high precision and stable running. This design has carried on the timing simulation on Altera chip EP2C35F672C6, can satisfy 50MHz system clock.