3JOUPPI N P, SIDIROPOULOS S, MENON S. A speed, and supply noise evaluation of ECL driver circuits [ J ]. IEEE Journal of Solid-State Circuits, 1996, 31 (1) :38.
4WATANABE Y, HOMMA N, DEGAWA K, et al. High-level design of multiple-valued arithmetic circuits based on arithmetic description language [ C ]// Proceedings of 38th IEEE International Symposium on Multiple Valued Logic. California: IEEE Computer Society Press, 2008 : 112-117.
5WU Xunwei, ZHANG Zhuan. Theory of differential current switches and logic design of ternary ECL circuits at switch level [ J ]. Intemational Journal of Electronics, 1991, 71 (6) : 1023-1035.
6H.Dunderdale,Current mode circuits for ternary logic realization,Electron,Lett,Vol.5,No.23,1969,575-577.
7吴训威 陈偕雄.Algebra system for ECL logic circuits[J].IEE Proceedings,1991:679-682.
8吴训威 章专.Theory of differential current switches and logic design of ternary ECL circuits at switch level[J].Int J,Electronics,6:1023-1035.
9吴训威,杭国强.Design technique of F L circuits based on multi-valued logic, J of Comput Sci & Technol Vol.11,No.2,1996,181-187.
