摘要
为了将边界扫描技术构架更好地应用于电路可测性设计中,在介绍边界扫描结构、测试基本原理的基础上,提出了运用单片机模拟边界扫描时序,控制被测电路进入相应边界扫描状态的方法;利用模拟开关控制整体扫描链路的转换,同时结合现有CPLD下载电路,完成了被测电路核心逻辑、外围管脚的设置,最后实现了基于IEEE1149.1测试访问门和边界扫描结构标准的边界扫描实验系统;实验系统可以完成IEEE1149.1的所有边界扫描测试,并具有实现简单、操作灵活等特点。
For better application of BST (Boundary Scan Test) structure to Design for testability (DFT) of circuit, on the foundation of introducing boundary--scan structure, basic principle, a method of simulating BST scheduling by programming singlechip and controlling BST status of the under--test circuit is presented. Control the conversion of scan chain by analog switch, at the same time combined with existing CPLD download circuit, accomplish the setting of under--test circuit' s core logic and periphery pins, finally achieve the BST experimentation system based on IEEE1149.1 test access port and boundary scan structure standard. Experimentation system can complete all IEEEl149.1 Boundary Scan test, meanwhile it has features of Simple operation and ease realization etc.
出处
《计算机测量与控制》
CSCD
北大核心
2009年第8期1476-1478,共3页
Computer Measurement &Control
关键词
边界扫描实验
时序模拟
互连测试
测试存取口
boundary--scan experimentation
scheduling simulation
interconnection test
test access port