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一种改进变步长LMS算法的性能研究 被引量:5

A New Variable Step Size LMS Adaptive Filtering Algorithm and Its Analysis
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摘要 在对传统LMS算法、变步长LMS算法及其改进算法分析的基础上,提出了一种改进的变步长LMS算法。新算法通过建立步长因子与误差信号之间的非线性函数关系,使其初始阶段和时变阶段步长自适应增大和稳态阶段步长很小,理论分析及计算机的仿真结果表明,该算法可保证较快的收敛速度和较小的失调,能更好地解决收敛速度和稳态误差的内在矛盾,可更好地应用于自适应系统中。 Based on a brief analysis of traditional LMS, variable step size LMS algorithm and its improved algorithm, a modified LMS algorithm of variable step size is proposed. The novel algorithm based on nonlinear functional relationship between the step-size and the error, increases adaptively at the beginning of the algorithm or when the channel is varying with time, and it would be smaller during the steady state. So the algorithm has the excellences of faster constringency, little steady error, tracking the change of the system and avoiding the effects of the noise. The theoretical analysis and computer simulation prove that the algorithm is better than traditional LMS algorithm.
作者 蔡卫菊 金波
机构地区 长江大学
出处 《计算机与数字工程》 2009年第8期39-41,共3页 Computer & Digital Engineering
关键词 LMS算法 变步长 误差信号 LMS algorithm, variable step size, error signal
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  • 1邱天爽,汪琏.广义相关时间延迟估计的自适应实现[J].海洋技术,1994,13(4):20-31. 被引量:8
  • 2万红,李申堂,王志刚.基于FM信号的无源雷达数据采集系统设计[J].系统工程与电子技术,2006,28(2):175-176. 被引量:3
  • 3朱家兵,陶亮,洪一.基于FM广播照射源的无源雷达直达波干扰抑制[J].系统仿真学报,2007,19(4):868-871. 被引量:11
  • 4Jenq Y C. Digital spectra of nonuniformly sampled signals: digital look-up tunable sinusoidal oscillators[ J]. IEEE Transactions on Instrumentation and Measurement, 1988,37(3) :358 -362.
  • 5Knapp C, Carter G. The generalized correlation method for estimation of time delay [ J ]. IEEE Transactions on Acoustics Speech and Signal Processing, 1976,24(4) :320 - 327.
  • 6Elbornsson J, Eklund J E. Blind estimation of timing errors in interleaved AD converters[ J]. ICASSP, 2001, 6:3913-3916.
  • 7Kaakinen J Y, Saramaki T. An algorithm for the optimization of adjustable fractional-delay all-pass filters [ J]. Proc of the 2004 int syrup on circuits and systems, 2004,3 : 153 - 156.
  • 8Jin H, Lee E K F. A digital-background calibration technique for minimizing timing-error effects in time- interleaved ADCs[ J]. IEEE Transactions on circuits and systems, 2000,47 ( 7 ) :603 - 613.
  • 9Li J, Wu R B. An efficient algorithm for time delay estimation[ J]. IEEE Trans on signal processing, 1998,46 (8) :2231 -2235.
  • 10Analog Devices, Inc. Ideal _8_ Bit. adc. [ EB] http:// www. analog. com/en/analog-to-digital-converters/ad-converter/products/evaluation-boardstools/CU_ADIsimADC_ evaluation_tools/resources/fca. html.

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