摘要
提出一种高速率8PSK信号的载波同步方案,数字锁相环组合频偏搜索实现接收机小频偏的载波同步;多组小频偏同步单元的并行操作获得接收机大频偏的粗略估计,基于反馈闭环实现载波粗同步,然后由一组小频偏同步单元完成残余频偏的精确跟踪及相位同步。分析了载波同步的抖动特性,并基于FPGA实现了该方案。测试结果表明,该载波同步方案动态范围大,跟踪性能好,相位抖动小,长期稳定性好,在中低信噪比下,系统实现损耗小于0.5dB。适合于中继卫星信道高速率8PSK信号的载波同步。
A carrier synchronization method for high rate 8PSK signals is proposed.DPLL associating with frequency searching completes carrier synchronization for small frequency offset;parallel operation of several such sections gets coarse estimation of the bigger frequency offset,then the bigger frequency offset is removed by coarse carrier synchronization based on feedback structure.After that one DPLL associating with frequency searching completes refined frequency tracking and phase synchronization.We analyzed the jitter characteristic and implemented the algorithm with FPGA.Measure results show that this scheme can work well with big range of frequency offset,the carrier tracking is precise with little phase jitter,and is robust for long time running.System loss less 0.5dB is got at medium to low signal-to-noise ratio.The synchronization scheme is competent for the carrier synchronization of high rate 8PSK signals in DRSS.
出处
《电路与系统学报》
CSCD
北大核心
2009年第4期21-26,共6页
Journal of Circuits and Systems
关键词
载波同步
数字锁相环(DPLL)
数据中继卫星系统
抖动
carrier synchronization
digital phase lock loop(DPLL)
data relay satellite system(DRSS)
jitter
