数字化雷达通用信号处理机设计

Design of digital radar universal signal processor

本文以4片ADI公司高性能浮点DSP芯片TS201S为核心处理器,结合Xilinx公司高端V5系列FPGA芯片,设计了一种数字化雷达通用信号处理机。处理机通过合理设计总线互联结构、采用高速的串行接口和利用高速电路仿真技术,具有处理能力和数据交互能力强,通用性、可重构性和扩展性好的特点。通过在处理机上实现ISAR实时成像和数字波束形成,验证了处理机的性能和工程实用性。

This paper introduces a digital radar universal signal processor, which adopts 4 chips of TS201S as central processor and one chip of Virtex-5 series FPGA as coprocessor and interface controller. Through the reasonable design of bus structure, choosing high speed serial interface and using high speed circuit simulation technique, the processor owns the characteristics of good capability of data processing and alternation, excellent universality, recontructable performance and expansibility. The processor has been tested with real-time ISAR imaging and digital beam forming （DBF）. The testing result shows its good performance and practicability.