摘要
基于0.5μm CMOS工艺设计了一种应用于超高频段射频识别系统读卡器接收前端的低噪声放大器.该电路采用带有源极退化的单端共源共栅结构,借助Cadence仿真环境完成了电路的仿真分析.仿真结果表明,在中心工作频率922.5 MHz上,电路具有良好的性能,各指标分别为:噪声系数(NF)0.828 4 dB,输出增益(S21)23.37 dB,输入反射系数(S11)-36.65 dB,输出反射系数(S22)-58.03 dB,反相隔离(S12)-44.79 dB,三阶交调点(IIP3)-13.157 2 dBm.
Based on 0.5 μm CMOS technology, a low noise amplifier for UHF RFID Reader front-end was designed. This circuit used single-ended cascode topology with source degeneration, and its simulations were completed in Cadence environment. At the central frequency point 922.5 MHz, simulation results show that this circuit has the noise figure of 0.828 4 dB, the gain of 23.37 dB, the input return loss of -36.65 dB, the output return loss of -58.03 dB, the reverse isolation of 44.79 dB and the IIP3 of -13.157 2 dBm. All of these figures achieve the expected values.
出处
《南通大学学报(自然科学版)》
CAS
2009年第2期8-12,共5页
Journal of Nantong University(Natural Science Edition)
基金
江苏省高校重点实验室开放课题(JSICK0605)
关键词
超高频
读卡器
低噪声放大器
射频识别
ultra high frequency
reader
low noise amplifier
radio frequency identification