摘要
片上网络是对微系统芯片的传统片上互连结构的统一和发展,一种新的集成电路设计技术只有在它的测试技术发展完善后才能被广泛使用。首先建立了片上网络路由器FIFOs的功能模型,在此基础上,提出了一种基于可测性设计技术并且具有线性计算复杂度O(n)的FIFOs测试算法,论述了一种新颖的复用片上网络、共享内建自测试(BIST)结构对片上网络路由器FIFOs并行测试的方法。实验数据分析表明这种测试方法具有较高的故障覆盖率、较小的测试时间和片上资源开销。
Network-on-chip has recently emerged as a unification of current trends of on-chip data communication infrastructure for complex system-on-chip. Any new design methodology will only be widely adopted if it is complemented by efficient test mechanism. In this paper, we describe the functional model of FIFOs used in NoC routers and propose a novel FIFOs test algorithm based on design for testing technique to reduce the test complex- ity to O(n). We discuss a method of progressive reuse of the on-chip network to transport test data and sharing built-in self-test circuit to test the router FIFOs under test. Experiment results show that the method has the advantage of high fault coverage, short test time and low chip area overhead.
出处
《仪器仪表学报》
EI
CAS
CSCD
北大核心
2009年第8期1768-1772,共5页
Chinese Journal of Scientific Instrument
基金
中国教育部"新世纪优秀人才支持计划"(NCET-05-0804)
国家建设高水平大学公派研究生项目资助