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A multi-standard active-RC filter with accurate tuning system 被引量:1

A multi-standard active-RC filter with accurate tuning system
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摘要 A low-power, highly linear, multi-standard, active-RC filter with an accurate and novel tuning architecture is presented. It exhibits IEEE 802.11 a/b/g (9.5 MHz) and DVB-H (3 MHz, 4 MHz) application. The filter exploits digitally-controlled polysilicon resistor banks and a phase lock loop type automatic tuning system. The novel and complex automatic frequency calibration scheme provides better than 4 corner frequency accuracy, and it can be powered down after calibration to save power and avoid digital signal interference. The filter achieves OIP3 of 26 dBm and the measured group delay variation of the receiver filter is 50 ns (WLAN mode). Its dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from a 2.85 V supply. The dissipation of calibration consumes 2 mA. The circuit has been fabricated in a 0.35μm 47 GHz SiGe BiCMOS technology; the receiver and transmitter filter occupy 0.21 mm^2 and 0.11 mm^2 (calibration circuit excluded), respectively. A low-power, highly linear, multi-standard, active-RC filter with an accurate and novel tuning architecture is presented. It exhibits IEEE 802.11 a/b/g (9.5 MHz) and DVB-H (3 MHz, 4 MHz) application. The filter exploits digitally-controlled polysilicon resistor banks and a phase lock loop type automatic tuning system. The novel and complex automatic frequency calibration scheme provides better than 4 corner frequency accuracy, and it can be powered down after calibration to save power and avoid digital signal interference. The filter achieves OIP3 of 26 dBm and the measured group delay variation of the receiver filter is 50 ns (WLAN mode). Its dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from a 2.85 V supply. The dissipation of calibration consumes 2 mA. The circuit has been fabricated in a 0.35μm 47 GHz SiGe BiCMOS technology; the receiver and transmitter filter occupy 0.21 mm^2 and 0.11 mm^2 (calibration circuit excluded), respectively.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2009年第9期107-110,共4页 半导体学报(英文版)
关键词 MULTI-STANDARD low pass filter phase lock loop frequency calibration BICMOS multi-standard low pass filter phase lock loop frequency calibration BiCMOS
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  • 1Vasilopoulos A, Vitzilaios G, Theodoratos G, et al. A lowpower wideband reconfigurable integrated activc-RC filter with 73 dB SFDR. IEEE J Solid-State Circuits, 2006, 41(9): 1997.
  • 2Kousai S, Hamada M, Ito R, et al. A 19.7 MHz, fifth-order active-RC chebyshev LPF for draft IEEE802.11n with automatic quality-factor tuning scheme. IEEE J Solid-State Circuits, 2007, 42(11): 2326.
  • 3Yoshizawa A, Tsividis Y P. Anti-blocker design techniques for MOSFET-C filters for direct conversion receiver. IEEE J SolidState Circuits, 2002, 37(3): 359.
  • 4Rogin J, Kouchev I. A 1.5-V 45-mW direct-conversion WCDMA receiver IC in 0.13-μm CMOS. IEEE J Solid-State Circuits, 2003, 38(12): 2239.

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