低杂散低相噪频率合成器的设计

Design of Synthesizer with Low Spurs and Low Phase Noise

DDS+PLL是目前频率合成技术的常用组合方式之一。首先就DDS+PLL的几种常用合成方式的特点进行了简单介绍,然后着重利用DDS激励PLL的混频合成方式,实现了一种低杂散低相噪的频率合成器的设计。设计中首先在理论分析的基础上选出了合理的设计方案,然后对各项指标进行了可行性分析,尤其对输出相位噪声和组合杂散进行了详尽的阐述。最终通过理论分析,合理的选取时钟频率巧妙地避开了近端的杂散,用试验结果证明了该方案的可行性。

DDS＋PLL is one of the common combination modes in frequency synthesis technologies. Some characteristics of the common combination modes for DDS＋PLL are introduced, and then a design of frequency synthesizer with low spurs and low phase noise in which DDS plays a role as a reference frequency generator and PLL works as an active filter is achieved in this paper. The reasonable design scheme is chosen on the basis of theoretic analysis, and the feasibility of each index is argued, especially the output phase noise and combined spurs which are analyzed in detail. Finally, based on the theoretical analysis, the spurs inside the loop are avoided successfully through a smart choice of clock frequency, and the experimental results prove the validity of this method.