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一种低电压、高电源抑制的LDO

A Low-voltage,High PSR,Low Drop-Out Regulator
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摘要 应用在便携式电子设备中的集成电路,往往要求有高的集成度和低的工作电压,高的集成度使得电路各个模块产生的噪音耦合到电源电压这一情况更加严重,因此需要一款低电压、高电源抑制(Power Supply Rejection,简称PSR)的LDO(LowDrop-outVoltage Linear Regulator,低压降线性电压调节器)来供电。设计了这样一款LDO,仿真结果表明PSR在1kHz时为-78dB,电源电压可低至0.9V。 ICs for portable applications need high integration and low supply voltage. Because of high integration,more noise propagates onto the supplies. So a low voltage, high PSR LDO is needed. In this paper, such a LDO is proposed. The simulation results show that the PSR is -78dB at lkHz and the minimum supply voltage is 0.9V.
出处 《苏州大学学报(工科版)》 CAS 2009年第4期45-49,共5页 Journal of Soochow University Engineering Science Edition (Bimonthly)
关键词 LDO 低电压 PSR LDO low voltage PSR
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参考文献5

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