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利用半导体pn结结电容构成的沟道式电容器 被引量:3

Trench capacitors based on semiconductor pn junction capacitance
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摘要 为满足对电子系统中元器件性能提升、面积减小、成本降低等需求,利用感应耦合等离子体刻蚀技术(ICP),对低阻p型硅采用刻蚀、扩散、磁控溅射Al电极等工艺,使之形成凹槽状三维结构,制造出一种特殊的具有高密度电容量的硅基电容器。其特点是结构简单,电容量大(电容密度可达2.2×10–9F/mm2),容值可调,与现有微电子工艺兼容,可用于200MHz至数GHz的退耦或其他场合。同时由于半导体pn结固有的特性,该电容器可取代传统的贴片电容广泛用于电子系统中的退耦、滤波、匹配、静电和电涌防护等场合。 Nowadays, high performance, small size and low cost are always required by modem electronic systems. A new technology for fabricating decoupling capacitor on silicon chip was developed. In this method, trenches with quasi-3D structure were first formed on the silicon substrate through performing inductively coupled plasma (ICP) etching. After conducting doping via diffusion, fabricating A1 electrode through sputtering and etching, a kind of silicon based capacitor with high capacitance density was formed on the trenches. The prepared capacitors show simple structure, large and adjustable capacitance, and good compatibility with existing microelectronic technologies. They can be used for decoupling in the range of 200 MHz to 1 - 10 GHz. And, because of the characteristics of semiconductor, they can be used for ESD and surge protection which are impossible for conventional capacitors. As a replacement of conventional SMT capacitors, this kind of capacitor can be widely used for decoupling, filtering, ESD as well surge protection and matching in the electronic systems.
出处 《电子元件与材料》 CAS CSCD 北大核心 2009年第10期11-14,共4页 Electronic Components And Materials
基金 国家"863"计划资助项目(No.2006AA01Z236)
关键词 半导体pn结 结电容 沟道电容 半导体工艺 电容器 semiconductor pn junction junction capacitor trench capacitor semiconductor technics capacitor
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参考文献5

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同被引文献25

  • 1李祥超,周中山,陈则煌,陈璞阳.棒形天线耦合雷电电磁波及抑制方法[J].电波科学学报,2015,30(2):357-364. 被引量:15
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