基于信号噪声子空间的降秩算法及FPGA实现

Rank-reduction algorithm based on signal-noise subspace and its FPGA implementation

研究了OFDM信道向量自相关矩阵奇异值分解的FPGA实现。为了获得更好的实时性,将复矩阵的奇异值分解转换为实矩阵的奇异值分解;根据实对称矩阵SVD的特点设计阵列结构,减少了所占用的资源。基于MATLAB仿真和A ltera的软硬件开发平台对OFDM信道自相关矩阵奇异值分解的FPGA实现进行研究,仿真结果表明设计方案可以应用于OFDM信道估计系统中。

This paper proposed a simplified implementation method for SVD of hermitian matrix which transited hermitian matrix SVD to real symmetry matrix SVD in order to get high speed operation. Used systolic array structure which based on the character of SVD for symmetry matrix to save the system resource. Studied on the FPGA implementation of OFDM channel autocorrelation matrix SVD based on MATLAB simulation and Ahera platform. The simulated results demonstrate that the designed program of this paper is feasible for OFDM channel estimate system.