嵌入式CPU中断系统设计与实现

Interrupt System Design and Implement of Embedded CPU

中断系统是嵌入式CPU逻辑设计中必须考虑的部分之一。该部分的设计直接影响系统对中断和异常的响应速度,影响CPU电路的面积和功耗,也影响制造的成本。本文提出带有普遍适用的三种逻辑设计实现方案,以供参考。

Interrupt system is one of the necessary parts of embedded CPU logic circuit design. It affects interrupt exception responding speed, IC circuit area and powder. Also, the cost is influenced with it. This article offers three universal designs as reference.