基于流水线的FFT快速计算方法与实现技术

Theory and Application of FFT Based on Pipelined Stream

针对目前CDMA快速码捕获系统对捕获速度要求越来越高,在分析快速傅里叶算法理论的基础上,结合FPGA(Field Programmable Gate Array)的独特硬件结构,提出一种基于流水线的FFT(Fast Fourier Transform)快速实现方法,并对该方法进行了matlab仿真、ISE仿真和FPGA实验.研究结果证明:相比于传统的FFT实现方法,在保证计算精度的基础上,该方法实现了FFT计算数据的连续输入与输出,减小了捕获时延,缩短了至少1/3的计算时间,在100 MHz时钟时,完成4096点的FFT运算只需要42.05μs,为高速信号处理系统提供了一种更好的时频转换方法.

In order to reduce the calculation time of code acquisition in CDMA system, this paper analyzes the theory of FFT and the unique structure of FPGA, presents a new method for computing FFT based on pipelined stream. After Matlab simulation, ISE simulation and FPGA experiment, the results show that： the method has high precision and uses only 42μs, which is reduced by at least 1/3 of the computing time comparing with previous methods, to compute 4096 points FFT with the clock of 100 MHz. It offers a better DFT method for high speed digital signal processing.