摘要
以多维累加交叉并行级联单奇偶校验码为母码,提出了一种具有线性编码复杂度的删余速率兼容编码.将母码的每个编码支路所输出的奇偶校验比特分为一组,利用高斯近似密度进化方法确定各组奇偶校验比特的删余优先级别,通过对奇偶校验比特按组删余,构建了一组速率兼容编码.仿真结果表明,该编码在不同码率的误比特率性能均优于以(3,6)规则LDPC码为母码构建的删余速率兼容编码的性能.
A new class of rate-compatible (RC) punctured codes with linear encoding complexity based on the punctured multiple accumulated crossover parallel-concatenated SPC (M-ACSPC) codes are proposed. The parity check bits are grouped according to the order of the branch where they are generated in the mother codes. The puncturing priority for each group is determined by the density evolution using a Gaussian approximation. Different groups of parity check bits are punctured to implement RC-M-ACSPC codes at different code rates. Simulation results show that the RC-M-ACSPC codes proposed have a better bit-error-rate performance over a wide code rate range than punctured RC codes based on (3,6) regular LDPC codes.
出处
《西安电子科技大学学报》
EI
CAS
CSCD
北大核心
2009年第5期782-787,共6页
Journal of Xidian University
基金
"863"计划课题资助(2007AA01Z288)
国家杰出青年科学基金资助(60725105)
长江学者和创新团队发展计划资助
高等学校创新引智计划资助(B08038)
关键词
速率兼容编码
迭代方法
TURBO码
高斯近似
删余
rate-compatible codes
iterative methods
Turbo codes
Gaussian approximation
puncturing