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一种应用于GPS接收机的全单片CMOS低噪声放大器 被引量:1

Design of a Single-chip CMOS LNA for GPS Receiver
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摘要 采用0.18μm1.8V mixed CMOS工艺设计并实现了一种应用于GPS接收机的CMOS低噪声放大器,采用片内螺旋电感实现输入匹配和单片集成。测试结果表明在1.575GHz时,工作电流8mA,增益20dB,噪声系数小于1.7dB,IIP3为-10dBm。 A CMOS LNA matching with on-chip inductor for GPS receiver was designed and fabricated using 0.18 μm mixed CMOS progress.The LNA worked at 8 mA/1.8 V,exhibited 20 dB gain with noise figure below 1.7 dB and-10 dBm IIP3.
作者 铁宏安
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2009年第3期356-359,共4页 Research & Progress of SSE
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参考文献8

  • 1Kim C S, Park M, Kim CH,et al. A fully integrated 1.9 GHz CMOS low-noise amplifier[J]. IEEE Microwave and Guided Wave Letters, 1998, 8(8): 293- 295.
  • 2Rudell J C, Ou J J, Cho T B, et al. A 1.9 GHz wide- band IF double conversion CMOS receiver for cordless telephone applications [J]. IEEE J Solid-state Cir1997, 32(12): 2071-2087.
  • 3Leroux P, Steyaert M, Vassilev V,et al. A 1.3 dB NF CMOS LNA for GPS with 3 kV HBM ESD-protection[C]. IEEE European Solid-state Circuits Conference, 2002 : 335-338.
  • 4Leroux P, Janssens J, Steyaert M. A 0.8 dB NF ESD-protected 9 mW CMOS LNA operating at 1.23 GHz [J]. IEEE J Solid-state Circuits, 2002, 37(6): 760-765.
  • 5Shahani A, Shaeffer D, Lee T H. A 12 mW wide dynamic range CMOS front-end for a portable GPS receiver [J]. IEEE J Solid-state Circuits, 1997, 32 (12) : 2061-2070.
  • 6Montagna G, Gramegna G, Bietti I, et al. A 35 mW 3.6 mm^2 fully integrated 0.18 /lm CMOS GPS radio [J]. IEEE J Solid-state Circuits, 2003, 38(7): 1163- 1171.
  • 7Lee T H. The Design of CMOS Radio-Frequency Integrated Circuits[M]. England: Cambridge University Press, 1998 : 275-288.
  • 8Shaeffer D K, Lee T H. A 1.5 V, 1.5 GHz CMOS low noise amplifier[J]. IEEE J Solid-state Circuits, 1997,32(5): 745-759.

同被引文献10

  • 1D K Sheffer, T H Lee. A 1.5 V, 1.5 GHz CMOS low-noise amplifier [J]. IEEE I. Solid-State Circuits, 1997, 21(5): 745-759.
  • 2X Li, S Shekhar, D J Allstot. Gm-boosted common-gate LNA and differential Colpitts VCO/0VCO in 0.18- m CMOS [J]. IEEE ,l.SoUd-State Circuits, 2005, 40(12): 2609-2619.
  • 3G Wei, H Daquan. Noise and Linearity Optimization Methods for A 1.9-GHz Low Noise Amplifier [A]. Microwave and Millimeter Wave Technology [C]. 2002, 923-927.
  • 4X Fan, H Zhang, E S Sinencio. A noise reduction and linearity improvement technique for a differential cascode LNA [J]. IEEE J. Solid State Circuits, 2008, 43(3): 588-599.
  • 5S Blaakmeer, E Klumperink, D Leenaerts, B Nauta. Wideband Balun-LNA with simultaneous output balancing, noise-canceling and distortion-canceling [J]. IEEE J. Solid-State Circuits, 2008, 43(6): 1341-1350.
  • 6S C Blaakmeer, E A M. Klumperink, D M W Leenaerts, N Bram. A wideband noise-canceling CMOS LNA exploiting a transformer [A]. in Proc. IEEE Radio Frequency Integrated Circuits Symposium [C]. 2006.
  • 7J Borremans, P Wambacq, C Soens, Y Rolain, M Kuijk. Low-area active-feedback low-noise amplifier design in scaled digital CMOS [J]. IEEE J. Solid-State Circuits, 2008, 43(1 I): 2422-2433.
  • 8J Deen C.-H. Chen. A 4-roW monolithic CMOS LNA at 5.7 GHz with the gate resistance used for input matching [J]. IEEE Mierow. Wireless Comport. Lett., 2006, 16(4): 188-190.
  • 9C P Chang, J H Chen, Y H Wang. A fully integrated 5 GHz low-voltage LNA using forward body bias technology [J]. IEEE Mierow. Wireless Compon. Lett., 2009, 19(3): 176-178.
  • 10杨展,毛陆虹,郝先人,李彦明,陈铭义.低功耗限制的级间匹配型2.45GHz低噪声放大器设计[J].电路与系统学报,2008,13(6):73-77. 被引量:1

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