基于System Generator的插值滤波器的FPGA实现

FPGA Realization of Interpolation FIR Digital Filter based on System Generator

在数字示波器中,当最高采样率都不能满足系统要求的时候,我们需要对其进行相应倍数的插值。文章介绍了使用XILINX System Generator for DSP工具在MATLAB/Simulink的环境下完成算法的建模,然后生成相应的工程代码,来开发基于FPGA的插值数字滤波器,借助Modelsim工具验证实现结果。大大消除了原先系统工程师和软硬件工程师之间的隔阂,同时也简化了传统的FPGA开发流程。

In the digital oseilloscope, when the maximum sampling rate can＇t meet the system requirements, we need to do the corresponding multiples of the interpolation for it.This paPer introduces the use of XILINX System Generator for DSP tool in the MATLAB / Simulink environment far the completion of Algorithm modeling, and then generate the corresponding code, to develop FPGA-based digital interpolation filter, using Modelsim tools to verify the achievement of re, suits, Significactly eliminate the original system engineers and the gap between hardware and software engineers, but also to simplify the traditiona/development process of the FPGA.