摘要
As重掺杂Si片的电阻率可低到10-3Ω.cm,可用作外延片的衬底材料,对于正向压降低的半导体器件来说,用这类外延片制作器件是最恰当的选择。As重掺杂Si片在外延时容易产生气相自掺杂,尤其是同型外延时还存在固态外扩散现象,在整个制作器件过程中易产生工艺参数偏差,导致器件性能下降,严重时器件失效,当然衬底材料也可以选用价格较高的背处理工艺Si片,能有效地抑制由于后续加工工艺产生的许多缺陷。对某生产厂生产的一批器件电参数性能下降的原因进行了剖析,分析阐明了以As重掺杂Si片为衬底的外延片中衬底杂质对器件质量的影响。
The resistivity of highly As-doped Si wafers can be as low as 10^-3Ω.cm,, so that these Si wafers can be used as epitaxial substrates. This kind of epitaxial substrate is the most suitable material to make semiconductor devices of low forward voltage drop. However, highly As-doped Si wafers may have some problems such as vapor autodoping and solid state external diffusion. In the device process, these problems are likely to cause deviations of process parameters, which may worsen the performance or even make the device useless. Si wafer of back-surface processing which is comparatively more expensive can also be used as epitaxial substrate, which can effectively avoid defects caused by processing. Starting with analyzing performance reduction of some devices, the process parameters and the effects of impurities in epitaxial substrates on the quality of device were analyzed and illustrated.
出处
《半导体技术》
CAS
CSCD
北大核心
2009年第10期965-967,共3页
Semiconductor Technology
基金
上海市重点实验室基金支持项目(08DZ2272600)
关键词
重掺砷
外延层
衬底
杂质
电阻率
highly As-doped
epitaxial
substrate
impurity
resistivity