摘要
为给数字广播电视设备提供AES3/EBU数字音频接口并提高系统集成度与灵活性,研究了一种采用ALTERA Cyclone II FPGA实现AES3/EBU数字音频接收器的方法,用过采样的技术提取出AES3/EBU数字音频数据中的时钟,并且将每一帧中的音频取样值及其相关数据同步并行输出,也可转换成IIS的形式输出,完成了专用的AES3/EBU数字音频接收芯片的功能。
This paper presents a way to realize the AES3/EBU digital audio receiver with ALTERA Cyclone II FPGA.By using the over-sampling technology,it recovers the clock from the AES3/EBU digital audio,and output all of the data contained in every frame,also it can convert the parallel data into IIS format.So it realizes the function of ASIC that used as the receiver of AES3/EBU digital audio.it can get help from this design to improve integration degree and flexibility of the system in the project.
出处
《信息技术》
2009年第9期115-116,120,共3页
Information Technology