基于Multisim10的频率合成器仿真与实现

Simulation and Realization of Frequency Synthesizer Based on Multisim10

介绍了锁相环工作原理及在Multisim10仿真平台中构建锁相环仿真模型的方法,实现了锁相式频率合成器的仿真,给出了不同电路参数下的仿真结果,较好地解决了频率合成器的电路设计与优化。

This thesis introduces the working mechanism of PLL （phase locked loop） and the way in which the model of PLL is built in a platform of MultisimlO simulation. It realizes the simulation of PLL frequency synthesizer, offers the simulated results under different circuit parameters, and better resolves the designing and upgrading of circuits in frequency synthesizer.