面向数据驱动处理器阵列的自动综合

Automatic Synthesis of Data-Driven Processor Arrays

本文提出了一种数据驱动处理器阵列结构,该结构能有效平衡存储和计算,适合用于在FPGA上实现高性能的算法加速,同时提出了一个面向该结构的自动综合框架,通过该框架可以将常规循环有效地映射到数据驱动处理器阵列上。实验结果表明了该自动综合框架的有效性,且生成的设计性能优于通用处理器。

This paper presents a data-driven processor array architecture, which is able to balance memory access and computation efficiently and is suited to implement high-performance accelerators on FPGAs. A framework for automatic synthesis for data-driven processor array is also proposed. Our framework enable efficient mapping of regular loop programs to processor arrays. Experimental results show the availability of our framework and that FPGA-based design can achieve better oerformance than general CPU.