摘要
曙光5000芯片组是曙光5000计算单元中的系统控制器,它通过HT接口连接两颗CPU并提供高速网络通信能力。为了确保曙光5000芯片组的功能正确性,我们为其设计了系统级功能验证平台SVP。SVP采用分层结构对系统进行建模,通过对本地计算单元的系统软件行为、硬件平台功能以及远程计算单元的网络行为进行模拟,提供了接近真实系统的验证环境。在曙光5000芯片组的验证过程中,SVP发现并排除了逻辑设计中的大多数功能错误,通过并行验证加速了验证覆盖率的收敛过程。
The Dawning 5000 Chipset is the system controller of the dawning 5000 computing unit, which connects two CPUs through the HT interfaces and provides a high-speed network interface. To ensure the correctness of the chipset functions, we design a system verification platform (SVP). SVP uses the layered architecture to model the system, by simulating the software behavior, the hardware platform function and the remote computing units, SVP provides a verification environment close to the real system environment. In the verification of the Dawning 5000 Chipset, SVP can find and remove most of the errors in the logic design, and accelerate the converging process of verification coverage.
出处
《计算机工程与科学》
CSCD
北大核心
2009年第11期37-39,44,共4页
Computer Engineering & Science
基金
国家863计划资助项目(2006AA01A102)
关键词
芯片组
功能验证
建模
模拟
覆盖率
chipset
functional verification
modeling
simulation
coverage