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耐擦写能力测试评估中的样本数选取方法

Determination of the Sample Size for Endurance Tests
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摘要 介绍了非挥发性记忆体产品在进行耐擦写能力测试评估时如何合理地选取样本数的方法。在集成电路的可靠性测试中,样本数通常被理解为样品数,即芯片的颗数。对样本数进行了新的定义,将样本数定义为"芯片颗数×扇区数"。这种定义吻合产品可靠性测试对样本的基本定义,可以适用于所有的集成电路可靠性测试,尤其适用于非挥发性记忆体的耐擦写能力测试评估。为了保证相同的测试信心度,考虑到在耐擦写能力测试中周边电路对耐擦写能力测试结果的影响,依照对样本数新的定义,在进行样本数等值选取计算的时候,引入了一个全新的补偿因子f,并且给出了样本数等值计算的公式。实验结果表明,在引入补偿因子f后,样本数等值计算结果更加可靠。 A new method to determine the sample size for NVM endurance test was introduced. Most of the time, sample size is defined as the number of chip. A new definition on sample size is given to be "chips number × blocks number". This new definition copes well with the basic concept, and can be applied on all IC reliability test, especially for the quickly risk assessment of NVM (non-volatile memory) product endurance tests. To get the same confidence level, and considering the influence of periphery circuit, a new factor "f" is implemented to calculate the sample size for NVM endurance test. The formula and character of "f" are discussed.
出处 《半导体技术》 CAS CSCD 北大核心 2009年第11期1114-1117,共4页 Semiconductor Technology
关键词 非挥发性记忆体 耐擦写能力测试 可靠性风险评估 样本数 NVM(non-volatile memory) endurance test reliability risk assessment sample size
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参考文献3

  • 1Electrically erasable programmable ROM (EEPROM)program/erase endurance and data retention stresstest. JESD22-A117-2006 .
  • 2MORI S,KANEKOY,ARAI N,et al.Reliabilitystudy of thininter-poly dielectrics for nonvolatile memory application[].Proc of IEEEIRPS.1985
  • 3Stress-Test-Driven Qualification of Integrated Circuits. EIA/JEDEC JESD-47 .

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