期刊文献+

用于单片集成真空传感器的SAR型ADC设计

Successive approximation register ADC for monolithic vacuum sensor
下载PDF
导出
摘要 设计了一款适用于单芯片集成真空传感器的10位SAR型A/D转换器.轨至轨比较器通过并联两个互补的子比较器实现.信号采样时,比较器进行失调消除,提高电路的转换精度.电路采用0.5μm2P3M标准CMOS工艺制作.系统时钟频率为20MHz,输入电压范围为0~3V.在1.25MS/s采样率和4.6kHz信号输入频率下,电路的信噪比为56.4dB,无杂散动态范围为69.2dB.芯片面积为2mm2.3V电源电压供电时,功耗为3.1mW.其性能已达到高线性度和低功耗的设计要求. A 10-bit successive approximation register analog-to-digital converter (ADC) is presented for monolithic vacuum sensor. Rail to rail comparator is achieved by paralleling two complementary comparators. Offset cancellation circuit is included to improve the precision of the ADC. The circuit is fabricated in a 0.5μm 2P3M standard CMOS process. The system clock frequency is 20 MHz and the input voltage changes from 0 to 3 V. The effective chip area is 2 mm^2. The signal to noise and distortion ratio of 56.4 dB and the spurious-free dynamic range of 69.2 dB are achieved with 4.6 kHz sinusoid wave and 1.25 MS/s sample rate. The The proposed ADC meets the requirements of hi po gh wer dissipation is 3.1 mW at 3 V supply voltage. linearity and low power dissipation.
出处 《大连理工大学学报》 EI CAS CSCD 北大核心 2009年第6期958-963,共6页 Journal of Dalian University of Technology
基金 国家自然科学基金资助项目(90607003)
关键词 逐次逼近 A/D转换器 低功耗 CMOS 单片集成真空传感器 successive approximation analog-to-digital converter(ADC) low power dissipation CMOS monolithic vacuum sensor
  • 相关文献

参考文献13

  • 1WITVROUW A, VAN STEENKISTE F, MAES D, et al. Why CMOS-integrated transducers? A review[J]. Microsystem Technologies, 2000, 6(5) :192-199.
  • 2ABDELHALIM K, MACEACHERN L, MAHMOUD S. A nanowatt successive approximation ADC with offset correction for implantahle sensor application [C] // 2007 IEEE International Symposium on Circuits and Systems. Piscataway: IEEE, 2007 :2351-2354.
  • 3SCOTT M D, BOSER B E, PISTER K S J. An ultralow-energy ADC for smart dust [J]. IEEE Journal of Solid-state Circuits, 2003, 38 (7): 1123-1129.
  • 4袁小龙,赵梦恋,吴晓波,严晓浪.低功耗高精度逐次逼近型模数转换器的设计[J].浙江大学学报(工学版),2006,40(12):2153-2157. 被引量:5
  • 5赵天挺,隋海建,曲静然,高清运,秦世才.一种12-b 125 kSPS全差分CMOS SAR A/D转换器[J].微电子学,2004,34(6):694-697. 被引量:2
  • 6ZHANG Feng-tian, TANG Zhen-an, YU Jun, et al. A micro-Pirani vacuum gauge based on micro-hotplate technology [J]. Sensors and Actuators, 2006, 126(2) :303-305.
  • 7ROSSI A, FUCILI G. Non-redundant successive approximation register for A/D converters[J]. Electronics Letters, 1996, 32(12) : 1055-1057.
  • 8SHYN Jyn-bang, TEMES G C, KMMMENACHER F. Random error effects in matched MOS capacitors and current sources [J].IEEE Journal of Solid-state Circuits, 1984, 19(6) :948-955.
  • 9BADER R J,LI H W,BOYCE D E.CMOS电路设计·布局与仿真[M].陈中建,译.北京:机械工业出版社,2006.
  • 10JOHNS D A, MARTIN K. Analog Integrated Circuit Design [M]. New York:Wiley, 2002.

二级参考文献16

  • 1Geiger R L. VLSI design techniques for analog and digital circuits[M]. McGraw-Hill Inc., 1990.
  • 2Promitzer G. 12-bit low-power fully differential switched capacitor noncalibrating successive approximation A/D converter with 1 MS/s[J]. IEEE J Sol Sta Circ, 2001, 36 (7): 1138-1143.
  • 3Allen P E. CMOS analog circuit design[M]. Publishing House of Electronics Industry, 2002.
  • 4Razavi B. Design of analog CMOS integrated circuits[M]. McGraw-Hill Company, Inc., 2001.
  • 5PROMITZER G.12-bit low-power fully differential switched capacitor noncalibrating successive approximation ADC with 1 MS/s[J].IEEE Journal of Solid-State Circuits,2001,36(7):1138-1143.
  • 6PARK J,PARK H J,KIM J W,et al.A 1 mW 10-bit 500KSPS SAR A/D converter[C]∥ Proceedings of IEEE International Symposium on Circuits and Systems.Geneva,Switzerland:Presses Polytechniques et Universitaires Romandes,2000,5:581 -584.
  • 7MCCREARY J L,GRAY P R.l-MOS charge redistribution analog-to-digital conversion techniques-Part Ⅰ[J].IEEE Journal of Solid State Circuits,1975,10(6):371-379.
  • 8RAZAVI B.Design of analog CMOS integrated circuits[M].New York:McGraw-Hill,2000.
  • 9ALLEN P E,HOLBERG D R.CMOS analog circuit design[M]2版.北京:电子工业出版社,2002..
  • 10CONG Yong-hua,GEIGER R L.Switching sequence optimization for gradient error compensation in thermometer-decoded DAC arrays[J].IEEE Transactions on System,2000,47(7):585-595.

共引文献5

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部