摘要
随着互联网的普及和图像应用范围的不断扩大,对图像的处理提出了新的要求,为满足高速实时图像处理的要求,提出一种基于FPGA为辅助单元,ADSP-BF561处理器为核心图像数据处理单元的并行系统结构。其中DSP负责图像处理,FPGA负责实现整个系统的数字逻辑及I2C总线的配置,增加了该系统的灵活性及实时性。同时结合离散整数小波变换算法,在硬件系统上实现了整数小波变换,取得了较好的试验效果。
With the extensive usage of internet and image processing,some new requirements,such as accurate image recognition and real-time processing,are to be performed well.To meet the high speed real-time image processing requirements,an architecture in a parallel system based on accessorial units field programmable gate array(FPGA) is presented,whose main core image data calculation units are digital signal processor(DSP) chips: ADSP-BF561.In the system,DSP processes the image data,the accessorial control of the whole system are implemented by FPGA, including inter-integrated circuit (I2C) bus configuration. Combining with discrete wavelet transform, the integral wavelet transform has been realized on hardware system, and the experimental results are satisfying.
出处
《青岛科技大学学报(自然科学版)》
CAS
2009年第5期451-453,共3页
Journal of Qingdao University of Science and Technology:Natural Science Edition