基于FPGA的多路数据采集系统设计

Design of Several-channels Data Acquisition System based on FPGA

介绍了一种基于FPGA的高速多路数据采集系统的设计方案,描述了系统的主要组成及FPGA的实现方法,并用VHDL语言设计的状态机在QuartusⅡ开发软件中进行仿真。该系统在通用数据采集系统的基础上,增加数据编码模块,将多路数据组合为一路进行存储;采用批处理数据方式,减少数据编码次数,加快数据处理速度。实验表明,能够实时存储多路数据,效果良好。

The paper introduces the design of high-speed multi-channel real time data collection system based on FPGA. The main component of the system and the achieving method of FPGA are described. Emulate the system in the development of Quartus Ⅱ software by FSM which is designed by VHDL. on a basis of the universal data collection system, add data coding module to fit several channels together one channel and record. Adopting batch processing mode to reduce the time of date coding, and pick up the speed of data processing. The experimental results prove that the system can collect date real-timely and run well.