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Dither信号理论分析及仿真 被引量:3

Analysis and Simulation of Dither Signals
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摘要 模拟数字转化器(ADC)具有典型的非线性特性,其输出噪声对输入信号存在着依赖关系。为了降低ADC的非线性,对减性Dither量化器控制系统进行了数学分析,得出了使量化器输出噪声与输入信号无关所需要满足的充分必要条件。并利用LabVIEW搭建了减性Dither量化器控制系统数字仿真平台,对系统分别加入宽带白噪声Dither信号和窄带正弦Dither信号,仿真结果表明适当地选取Dither信号将有效地改善ADC的性能。 The Analog-to-Digital Converter (ADC) has a typical nonlinear feature and its output noise relies on the input signal. To decrease the nonlinearity, we made mathematical analysis to Dither quantizer control system, and obtained the necessary and sufficient condition for making the output noise independent of the input signal. LabVIEW was used to complete simulation by adding different Dither signals on the system, including broadband white noise Dither signal and narrow band Sine Dither signal. Simulation result showed that the performance of ADC can be improved effectively by choosing the right Dither signal.
作者 陈静 侯媛彬
出处 《电光与控制》 北大核心 2009年第12期46-47,57,共3页 Electronics Optics & Control
关键词 Dither信号 频谱分析 ADC SFDR Dither signal spectrum analysis Analog-to-Digital Converter(ADC) SFDR
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  • 1[1]John Vanderkooy,et al.Resolution Below the Least Significant Bit in Digital Systems with dither[J].J Audio Eng Soc,1984,32(3):106

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  • 1李国.基于过采样技术提高ADC分辨率的研究与实现[J].计算机工程,2005,31(B07):244-245. 被引量:16
  • 2WAGDY Mahmoud Fawzy. Effect of various Dither forms on quantization errors of ideal A/D converters [J]. IEEE Transactions on Instrumentation and Measurement, 1989, 38 (4): 850-855.
  • 3GRAY Robert M. Quantization noise spectra [J].IEEE Transaction on Information, 1990, 36 (6): 1220-1243.
  • 4CARBONE Paolo, PETRI Dario. Effect of additive Dither on the resolution of ideal quantizers [J].IEEE Transactions on Instrumentation and Measurement, 1994, , 43 (3): 389-396.
  • 5WANNAMAKE Robert Alexander. The theory of dithered quantization [D]. Belgium: University of Waterloo, 2003.
  • 6CHIU Yun, GRA Paul R. A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR EJ]. IEEE Journal of Solidstate Circuits, 2004, 39 (12): 2139-2151.
  • 7SHU Yun-shiang, SONG B S. A 15-bit linear 20-MS/s pipelined ADC digitally calibrated with signal-dependent dithering [J].IEEE Journal of Solid-state Circuits, 2008, 43 (2): 342-350.
  • 8SHU Y S, SONG B S. A 15 -bit linear 20-MS/s pipe[ined ADC digital- ly calibrated with signal-dependent Dithering [ J ]. IEEE Journal of Solid-State Circuits, 2008,43 (2) :342-350.
  • 9Hewlett Packard Company. The dynamie range benefits of large-scale Dithered Analog-to-Digital conversion in the HP89400 series VSAs[ M ]. [ S. 1. ] :Hewlett Packard,1994.
  • 10罗茂根.提高Pipeline-ADC分辨率与SFDR性能的内部Dither技术研究[D].成都:电子科技大学,2012:7-37.

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