期刊文献+
任意字段
题名或关键词
题名
关键词
文摘
作者
第一作者
机构
刊名
分类号
参考文献
作者简介
基金资助
栏目信息

单个浮置场限环终端结构击穿电压模型 被引量：1

Breakdown Voltage Model of Single Floating Field Ring Termination
下载PDF
导出
摘要 基于B.J.Baliga的击穿电压理论,通过求解双边突变圆柱结的泊松方程,提出了单个浮置场限环终端结构的击穿电压解析模型。该模型计算结果与模拟结果的误差在±7%之内,具有精度高、应用范围广等特点,可以帮助设计者初步确定浮置场限环注入窗口大小及与主结的间距等关键参数。 An analytical breakdown voltage model of single floating field ring termination was proposed base on Bo J. Baliga＇s theory of breakdown voltage and Possion＇s Equatioru The error between calculation and simulation results are within ±7%. The model can help designer define key parameters, such as diffusion area of the floating field ring and pitch-width between the main junctions and the floating field ring. The model features high precision and wide application.
作者 孙伟锋 王佳宁 易扬波
机构地区 东南大学国家ASIC系统工程技术研究中心
出处 《微电子学》 CAS CSCD 北大核心 2009年第6期848-851,856,共5页 Microelectronics
基金 江苏省自然科学基金资助项目(BK2008287) 东南大学国家自然科学基金预研支持项目(XJ2008312)
关键词 浮置场限环 击穿电压模型 终端结构 Floating field ring Breakdown voltage model Termination
分类号 TN710 [电子电信—电路与系统] TN432 [电子电信—微电子学与固体电子学]
  • 相关文献

参考文献8

  • 1BALIGA B J. Closed-form analytical solutions for the breakdown voltage of planar junctions terminated with a single floating field ring [J]. Solid-State Electronics, 1990, 33(5): 485-488.
  • 2BALIGA B J. Power semiconductor devices[M]. USA: PWS Pub. Co, 1996.
  • 3BOISSON V, LE HELLEY M, CHANTE J P. Analytical expression for the potential of guard rings of diodes operating in the punch-through mode[J]. IEEE Trans Elec Dev, 1985, 32(4) : 838-840.
  • 4BREIGER K. P, GERLACH W, PELKA J. Blocking capability of planar devices with field limiting rings [J]. Solid-State Electronics, 1983, 26(8): 739-745.
  • 5SUH KA-D, HONG S-W, LEE K, et al. An analysis for the potential of floating guard rings [J]. Solid- State Electronics, 1990, 33(9): 1125-1129.
  • 6BAE D-G, ChUNG S-K. An analytical model of planar junctions with multiple floating field limiting rings [J]. Solid-State Electronics, 1998, 42(3): 349-355.
  • 7HE J, HUNG R, ZHANG X, et al. Analytical model of three-dimensional effect on voltage and edge peak field distributions and optimal space for planar junction with a single field limiting ring [J]. Solid-State Electronics, 2001, 45(1): 79-85.
  • 8何进,张兴.场限环结构电压和边界峰值电场分布及环间距优化[J].固体电子学研究与进展,2003,23(2):164-169. 被引量：8

二级参考文献13

  • 1陈星弼.场限环的简单理论.电子学报,1988,:6-9.
  • 2Kao Y C, Wolley E D. High voltage planar p-n junctions. Proc IEEE, 1967;55:1409-1414.
  • 3Adler Michael S, Temple Victor A K, Ferro Armane P, et al, Theory and breakdown voltage for planar devices with a singe field limiting ring. IEEE Trans on Electron Devices, 1977;ED-24;107-113.
  • 4Whight K R, Coe D J. Numerical analysis of multiple field limiting ring system. Solid State Electronics,1984; 27:1021-1027.
  • 5Yasuda Seui, Yonezawa Toshio. High-voltage planar junction with a field-limiting ring. Solid State Electronics, 1982;25:423-427.
  • 6Brieger K P, Gerlach W, Pelka J. Blocking capability of planar devices with field limiting rings. Solid State Electronics, 1983;26 : 739-745.
  • 7Stefanov Evgueniy, Charitat Georges, Bailon Luis.Design methodology and simulation tool for floating ring termination technique. Solid State Electronics,1998;42:2251-2257.
  • 8Boisson V, Helley M Le, Chante J P, et al. Computer study of a high-voltage p-n-n-n diode and comparison with a field-limiting ring structure. IEEE Transon Electron Devices, 1986, ED-33 : 80- 84.
  • 9Boisson V, Helley M Le, Chante J P. Analytical expression for the potential of guard rings of diodes operating in the punch-through mode. IEEE Trans on Electron Devices, 1985 ; ED-32 : 838- 840.
  • 10Suh Kang-Deog, Hong Soon-Won, Lee, Kwyro, et al. An analysis for the potential of floating. Solid State Electronics, 1990;33:1125-1129.

共引文献7

同被引文献6

  • 1BALIGA B J. High-voltage device termination techniques., a comparative review [J]. IEE Proc I - Sol Sta : Elec Dev, 1982, 129(5): 173-179.
  • 2KRIZAJ D, AMON S, MINGUES C, et al. Spiral junction termination [J]. IEEE Trans Elec Dev, 1997, 44(11) : 2002-2010.
  • 3UDREA F, TRAJKOVIC T, THOMSON J, et al.Ultra-high voltage device termination using the 3D RESURF (super-junction) concept - experimental demonstration at 6. 5 kV[C] // ISPSD. Osaka, Japan. 2001: 129-132.
  • 4THEOLIER L, MAHFOZ-KOTB H, ISOIRD K, et al. A new junction termination technique., the deep trench termination (DT2) [C] // ISPSD. Barcelona, Spain. 2009: 176-179.
  • 5HONDA S, FUJII R, KAWAKAMI T, et al. A concept of a novel edge termination technique., junction termination (RJT) [C] //ISPSD. Hiroshima, Japan. 2010: 111-114.
  • 6宋文斌,蔡小五.一种新型高压功率器件终端技术[J].微电子学,2011,41(4):567-569. 被引量：13

引证文献1

二级引证文献8

微电子学
2009年 第6期

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部