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一种轨对轨两级CMOS运算放大器的设计

Design of a rail-to-rail two stages CMOS operational amplifier
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摘要 目的设计一个具有轨对轨输入和输出摆幅的两级CMOS运算放大器。方法输入级采用两对单一类型的n沟道差分对管作为输入管,用两个相同的n沟道源跟随器来完成输入电平的直流电平转移,实现了轨对轨的输入摆幅;输出级采用前馈甲乙类控制的轨对轨输出级,保证了轨对轨的输出摆幅和较强的驱动能力。结果用标准的0.6μm CMOS BSIM3v3模型库对该放大器进行了仿真,开环电压增益、单位增益带宽和相位裕度分别达到了113.57dB,11.9MHz和53,°输入级跨导的变化在±5%内。结论所设计运算放大器其输入和输出摆幅为轨对轨,满足设计所提要求。 Aim To design a two stages CMOS Operational amplifier （op-amp） with Rail-to-Rail input/output swing. Methods The input stage is based on two pairs of single n-channel differential pairs, and two identical nchannel source followers as DC level shifters, which realizes rail-to-rail input swing. A feedforward biased class-AB rail-to-rail output stage is employed to ensure rail-to-rail output swing and strong driving capability. Results Using BSIM3v3 model of a standard 0. 6μm DPDM CMOS process,the results show that the maximum deviation in transconductance is maintained within ± 5%, and the open loop gain can reach 113.57dB with unity gain bandwidth of 11.9MHz MHz and phase margin of 53°. Conclusion The input/output swing of the op amp is rail-to-rail, which meets the design requirement.
作者 赵武 马云飞 王召 程卫东 张志勇
机构地区 西北大学信息科学与技术学院 西安微电子技术研究所
出处 《西北大学学报（自然科学版）》 CAS CSCD 北大核心 2009年第6期960-963,共4页 Journal of Northwest University（Natural Science Edition）
基金 教育部"春晖"计划基金资助项目(Z2005-1-61001)
关键词 轨对轨 AB类 单位增益带宽 相位裕度 rail-to-rail elass-AB unity-gain bandwidth phase margin
分类号 TN4 [电子电信—微电子学与固体电子学]
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参考文献12

  • 1AHMADI M M. An adaptive biased single_ stage CMOS opertional amplifier with a novel rail-to-rail constant-gm input stage[ J]. Analog Integrated Circuit and Signal Processing, 2005, 45( 1 ) :71-78.
  • 2张强,李攀,田泽,陈贵灿,刘宁.高性能Rail-to-Rail恒定跨导CMOS运算放大器[J].微电子学与计算机,2008,25(3):166-171. 被引量：5
  • 3权进国,张献英.轨到轨输入输出范围运算放大器的噪声分析和优化[J].中国集成电路,2008,17(5):61-64. 被引量：1
  • 4CARRILLO J M, DUQUE-CARRILLO J F, TORELLI G, et al. Constant-gin constant-slew-rate high-bandwith low- voltage rail-to-rail CMOS Input stage for VLSI cell libraries [ J ]. IEEE J Solid-State Circuit, 2003,38 ( 3 ) : 1364- 1372.
  • 5SONG T Y, HU J Y, LI X H, et al. A constant-gin constant-slew-rate rail-to-rail input stage with static feedback and dynamic current steering for VLSI cell libraries [ J ]. IEEE J Solid-State Circuits, 2007, 54(1) :76-80.
  • 6DUQE-CARRILLO J F, CARRILLO J M, AUSIN J L,et al. Transistor inversion level independent circuit technique for low-voltage rail-to-rail amplifiers [ J ]. IEE Proc- Circuits Devices Syst, 2004,151 (6) :565-571.
  • 7WANG S M, MAYHUGH T L, EMBABI S H K, et al. Constant-gm rail-to-rail CMOS op-amp input stage with overlapped transition regions [ J ]. IEEE J Solid-state Circuits, 1999,34(2) :148-156.
  • 8SAKURAI S, ISMAIL M. Robust design of rail-to-rail CMOS operational amplifiers for a low power supply voltage[ J ]. IEEE J Solid-State Circuit, 1996,31 (2) : 146- 156.
  • 9HUIJSING J H, HOGERVORS R L,DE LANGEN K J. Low-power low-vohage VLSI operational cells [ J ]. IEEE Trans Circuit and System-I, 1995,42( 11 ) :841-852.
  • 10HWANG C, MOTAMED A, ISMAIL M. Universal constant-gm input-stage architecture for low-voltage op amps [ J]. IEEE Trans Circuit and Systems-I, 1995,42 ( 11 ) : 886-895.

二级参考文献18

  • 1曹三林,何乐年.一种1.8-V Rail-to-Rail CMOS运算放大器的设计[J].微电子学与计算机,2006,23(11):121-125. 被引量：6
  • 2[1]Michel Steyaert,Willy Sansen; A high-dynam-ic-range CMOS op amp with low-distortion output structure,IEEE Journal of Solid-State Circuits,vol.22,pp.1204-1207,December 1987.
  • 3[2]John A.Fisher,Rudolf Koch; A highly linear CMOS buffer amplifier,IEEE Journal of Solid-State Circuits,vol.22,pp.330-334,June 1987.
  • 4[3]M.D.Pardoen,Mark G.Degrauwe; A rail-to-rail input/output CMOS power amplifier,IEEE Journal of Solid-State Circuits,vol.25,pp.501-504,April 1990.
  • 5[5]Eric A.Vittoz; MOS transistors operated in the later-al bipolar mode and their application in CMOS technol-ogy,IEEE Journal of Solid-State Circuits,vol.18,pp.273-279,June 1983.
  • 6[6]Ron Hogervorst,John P.Tero,Ruud G.H.Es-chauzier,Johan H.Huijsing; A compact power-efficient 3 V CMOS rail-to-rail input/output operational ampliti- er for VLSI cell libraries,IEEE Journal of Solid-State Circuits,vol.29,pp.1505-15 13,December 1994.
  • 7[3]Behzad Razavi.Design of Analog CMOS Integrated Circuits.北京:清华大学出版社,2005.
  • 8Montecelli D M. A quad CMOS single-supply op amp with rail-to-rail output swing[J]. IEEE J. Solid-Stare Cite., 1986 ,SC- 21 : 1026-1034.
  • 9Hogervorst R. CMOS low-voltage operational amplifiers with constant-gm rail-to-rail input stage[J]. Analog Integrated Circ. Signal Proc., 1994,5(2) : 135-146.
  • 10Huijsing J H, Linebarger D. Low-voltage operational amplifier with rail-to-rail input and output ranges[J]. IEEE J. Solid-S fare Circ., 1985,SC-20:1144-1150.

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西北大学学报（自然科学版）
2009年 第6期

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