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AES密码电路抗差分功耗分析设计 被引量:2

Differential Power Analysis resistant hardware implementation of AES cryptosystem
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摘要 针对差分功耗分析(DPA)攻击的原理及特点,分析了高级加密标准(AES)的DPA攻击弱点,采用掩盖(Masking)的方法分别对AES算法中字节代换部分(SubBytes)及密钥扩展部分进行了掩盖,在此基础上完成了AES抵御DPA攻击的FPGA硬件电路设计。通过对该AES的FPGA电路的差分功耗攻击实验验证,该方法能够很好地抵抗DPA攻击。 This paper firstly declares the principle of the Differential Power Analysis(DPA) attack technology,and shows the vulnerability for power analysis attack straightforward AES.Then,it gets the method about masking to reduce the differential power signal of an AES circuit and completes the circuit.Finally,with experiment,it proves this circuit can lead to the failure of differential power analysis.
出处 《计算机工程与应用》 CSCD 北大核心 2009年第36期63-65,188,共4页 Computer Engineering and Applications
基金 国家自然科学基金No.60571037 国家高技术研究发展计划(863)No.2007AA01Z454~~
关键词 差分功耗分析(DPA) 掩盖 高级加密标准(AES) Differential Power Analysis(DPA) masking Advanced Encryption Standard(AES)
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同被引文献16

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