摘要
通过分析920T核ARM处理器的高速片上系统总线AHB时序及其静态存储控制器SMC接口模型,研究IBM PC/AT和IEEE PC/104总线规范,提出一种在ARM平台上实现兼容PC/104总线的方案.深入探讨两种平台体系在存储器结构、指令系统及总线时序等方面的巨大差异,给出了克服这些差异并实现总线功能兼容的方法.该兼容总线解决了在ARM平台上无法使用标准PC/104模板的难题,采用该方案有利于在嵌入式系统的设计中兼取ARM处理器和PC/AT体系的优势.
A scheme was proposed to solve the compatibility problem for standard PC/104 device applied in ARM system,based on analysis to the Advanced High-Speed Bus timing and Static Memory Controller interface model of ARM920T core processor system and IBM PC/AT and IEEE PC/104 bus specification.The difference between the ARM system and the PC plat,in the aspects of instruction set,memory model,and bus timing,etc.,was discussed in detail.The proposed method can be of great help to the design of the embedded system by taking the advantage of both ARM processor and PC/AT system.
出处
《浙江工业大学学报》
CAS
北大核心
2009年第6期639-643,共5页
Journal of Zhejiang University of Technology
基金
浙江省科技计划项目(2006C11073
2006C21061)
浙江工业大学特种装备制造与先进加工技术教育部重点实验室开放基金资助项目(2009EP029)